New current sensing circuit technology in DC-DC chip - Power Circuit - Circuit Diagram

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New current sensing circuit technology in DC-DC chip

In DC-DC design, current loop control has become a commonly used control method due to the great advantages of current loop control mode. In the current loop, current sensing is the first and essential part of implementing a current control loop. In addition, current sensing is also the basis for the implementation of overcurrent protection, zero current protection, and slope compensation.

1 Overview of current sensing methods

The core design idea of ​​current sensing is that there is a quantifiable relationship between the designed circuit output signal (voltage or current) and the output current (through the power tube or inductor, etc.), ie Vout=f(ILx). In general, the current sensing circuit is sampled after the inductor or before the PMOS power transistor, as shown in Figure 1. According to Ohm's law, it is also an easy way to convert a current into a voltage signal that is easy to handle with a resistor. Unfortunately, the current through the PMOS transistor is extremely large (such as 500 mA or a few A). If the resistance value is too large, it will generate a lot of power consumption and reduce the conversion efficiency of the DC/DC chip. On-chip integrated resistor technology is extremely difficult to achieve with very small resistance and accurate resistance (eg less than 100 mΩ). But regardless of whether the resistor is externally connected or inductively used, two additional chip pins are added, which is unacceptable in many designs.

In the on-chip integrated resistor current sensing, there are two common optimization methods: one is to divide the PMOS tube into proportional proportions, such as N:1, and only add resistance sampling in one branch. Thus, the current flowing through the resistor is reduced to 1/(N+1), but the branch is added to the resistor, and the equivalent resistance of the path through which the current flows is no longer accurately proportional, and thus the resistor The accuracy of the induction is affected. The second is to use the on-resistance of the PMOS itself: R on = L / [μ N C ox W (V gs - V t )], so there is no problem of integrated resistance, but the on-resistance of the MOS transistor is subjected to the process, The influence of operating temperature factors is difficult to control accurately.

Due to the voltage through the inductor:

V L =(R L +SL)I L

Where: R L is the inductance parasitic resistance.

Then, by adding an RC filter as shown in Figure 2(a) across the inductor, the voltage across the capacitor:



Where: T = L / R L ; T 1 = R f C f ; R L is the inductance equivalent loss resistance.

In addition, due to the relationship between the change of the inductor voltage and the current change: V=Ldi/dt, on the contrary, integrating the inductor voltage with time and removing the L value can also obtain the I L value. The circuit is shown in Figure 2(b). Show.


However, these two methods require L or RL to be known, and also require the addition of chip pins.

Other methods include average current sensing technology, Hall effect sensing technology, and inductive transformers. The average current sensing technique also needs to know the parasitic resistance of the external inductor and is not suitable for IC integration. Hall's benefit sensing technology needs sensitive sensing of the change of the magnetic field caused by the change of the inductor current. However, the Hall sensor integrated in the CMOS process usually has defects such as low bandwidth, temperature sensitivity and low sensitivity. Otherwise, special process is required. Its application is also limited, and it is generally used in the field of motor control. At present, there is no report on DC/DC chip integration. Inductive transformers are limited by factors such as volume and cost, and are usually used in the field of high current.

2 Current mode based current sensing method

Figure 3 shows a circuit that uses SENSE-FET mode for current sensing. M H is a PMOS power transistor with a large output current flowing through it. The M HS is designed to have a 1:N ratio to M H and the amplifier has a large gain. Then, according to the feedback control theory, the amplifier forces the voltage at point A to be equal to the voltage at point B, then I S :I MH =1:N. In addition, since the current mirror forces I 1 =I 2 , then

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