Embedded Gateway Circuit Design Based on CAN Bus and Ethernet

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This paper proposes an industrial fieldbus and Ethernet interconnection method, introduces the design and implementation of protocol conversion gateway between Ethernet and CAN field bus, adopts AT89C55 as the main processor, realizes the interconnection of CAN bus and Ethernet through two interface chips. , respectively give their hardware structure and software design ideas. It provides a feasible method for enterprise information network and control network integration.

Ethernet interface module: This system selects AT89C55 single-chip microcomputer produced by Atmel Company with high performance price. It is oriented to measurement and control objects and embedded applications, so its architecture and CPU, instruction system, peripheral unit circuits are specifically designed according to this requirement. It has up to 20 KB of FLASH program memory, AT89C55 is fully compatible with 8051 instruction set, on-chip FLASH is convenient for users to program online, working at up to 33 MHz, 256 B internal RAM, 32 programmable I/O Port, 3 16-bit timer/counter, 8 interrupt sources, support low-power idle mode. The Ethernet interface uses the RTL8019AS chip, a highly integrated Ethernet controller from Realtek that implements all the functions of the Ethernet Media Access Layer (MAC) and Physical Layer (PHY). There are two RAM areas inside the RTL8019AS: one is 16 KB, the address is 0x4000~0x7fff. To receive and send data packets, you must read and write 16 KB of RAM inside the RTL8019AS through DMA. It is actually dual port RAM, that is, there are two The bus is connected to it, one bus is used for RTL8019AS to read/write or write/read the RAM, ie local DMA; the other bus is used for reading or writing the RAM, ie remote DMA; the second is 32 bytes, the address is 0x0000~ 0x001F, used to store the Ethernet physical address. The hardware interface schematic diagram of the main control chip and Ethernet interface chip is shown in Figure 2. It is worth noting that since the Ethernet packet can exceed 1 500 bytes at most, the AT89C55's on-chip RAM has only 256 bytes, so it is impossible to store such a large packet, so a 32 KB external RAM is extended here. Can also improve the data transmission speed of the microcontroller.

CAN interface module: The main components that make up the CAN system are the CAN controller and transceiver. In this design, the CAN interface module uses the SJA1000 chip and the PCA82C250 chip. The SJA1000 is a stand-alone CAN controller that is a replacement for another PC controller, the PCA82C200 from Philips, and adds a new operating mode (Peli CAN) that supports the CAN 2.0B protocol. SJA1000 mainly completes the CAN communication protocol, which realizes the assembly and splitting of messages, filtering and verification of received information.

The PCA82C250 is the interface between the CAN controller and the physical bus and is used to enhance the drive capability of the system. In a transceiver-based system, the number of nodes can be at least 110, while also reducing radio frequency interference (RFI) and strong immunity to electromagnetic interference (EMI). There are several places to pay special attention to when dealing with this part of the circuit:

(1) Problems with the crystal oscillator circuit. Both the 89C55 and the SJA1000 should have separate crystal oscillator circuits. It is not possible to drive the microcontroller with the clock output signal CLKOUT of the SJA1000.

(2) The problem of the reset pin. Although the reset of the SJA1000 is low, it cannot be directly connected to the reset pin of the microcontroller through a NOT gate. Generally, there are two ways to solve the reset pin problem: the first one is to use the I/O pin of the microcontroller to control the reset pin of SJA. The advantage is that the MCU can completely control the reset process of SJA; the second is to adopt appropriate To reset the chip, the design is the first method to reduce costs.

(3) The potential of the RX1 pin must be maintained at approximately 0.5 VCC, otherwise the logic level required by the CAN protocol will not be formed.

(4) It is necessary to pay attention to the terminal impedance matching of the cable, which directly affects whether the CAN bus can work normally and network performance. The hardware circuit diagram of the CAN interface module is shown in Figure 3. A slope resistor R is connected to the RS pin of the PCA82C250, and the size of the resistor can be appropriately adjusted according to the bus communication speed.